发明名称 Timing recovery phase locked loop
摘要 Methods and apparatus for timing recovery phase locked loops. One embodiment provides a phase detectors for generating phase difference signals on the basis of a received feedback signal and an input clock signal and an input data signal, respectively. A digital control unit is adapted to generate a control signal depending on the first and second phase difference signals A digitally controlled oscillator generates an output clock signal depending on the control signal. A feedback unit feeds the output clock signal to an input of the first phase detector as the feedback signal. And a data acquisition unit receives the data signal and the output clock signal of the digitally controlled oscillator to provide a data output signal synchronized to the output clock signal.
申请公布号 US2007104292(A1) 申请公布日期 2007.05.10
申请号 US20050267930 申请日期 2005.11.04
申请人 GREGORIUS PETER 发明人 GREGORIUS PETER
分类号 H03D3/24 主分类号 H03D3/24
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