| 摘要 |
PROBLEM TO BE SOLVED: To provide an operational amplifier wherein the size of differential transistors and the layout area or the like can be reduced. SOLUTION: A high withstanding voltage current mirror circuit 14 is connected to a post-stage of a differential amplifier circuit 12 for receiving a low voltage signal in the operational amplifier, low withstanding voltage transistors (M1, M2) 24, 26 being Nch FETs are connected to input terminals 20, 22 in the differential amplifier circuit 12, Nch high withstanding voltage (HV) transistors (M4, M5) 28, 30 are respectively connected to the drains of the transistors 24, 26 via connecting points (N1. N2), and a bias potential (BIAS2) is applied to both the gates. The sources of the low withstanding voltage transistors (M1, M2) 24, 26 are connected to the drain of a low withstanding voltage transistor (M3) 34, the gate of which receives supply of a bias potential (BIAS1) and which acts like a current source, and the size of the low withstanding voltage transistors (M1, M2, M3) 24, 26, 34 is selected smaller than the size of the high withstanding voltage transistors. COPYRIGHT: (C)2007,JPO&INPIT
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