| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce leakage from a storage node in a DRAM cell so-called a gain cell. <P>SOLUTION: The semiconductor storage device has a write transistor WT, a transfer transistor TT, an amplifier transistor AT and a charge storage capacitor (storage capacitor C1). In the write transistor WT, either a source or a drain domain is connected with a write bit line WBL and the other is connected with a gate of the amplifier transistor AT, and a gate is connected with a write wordline WWL. In a transfer transistor TT, either a source or a drain domain is connected with the gate of the amplifier transistor AT and the other is connected with a storage node electrode of the storage capacitor C1, and the gate is connected with a transfer gate line TG. A drain of the amplifier transistor AT is connected with a read bit line RBL, and a source is connected with a common source line CSL. <P>COPYRIGHT: (C)2007,JPO&INPIT |
