| 摘要 |
The invention relates to a method of manufacturing a semiconductor device ( 10 ) with a field effect transistor, in which method a semiconductor body ( 1 ) of silicon is provided at a surface thereof with a source region ( 2 ) and a drain region ( 3 ) of a first conductivity type, which both are provided with extensions ( 2 A, 3 A) and with a channel region ( 4 ) of a second conductivity type, opposite to the first conductivity type, between the source region ( 2 ) and the drain region ( 3 ) and with a gate region ( 5 ) separated from the surface of the semiconductor body ( 1 ) by a gate dielectric ( 6 ) above the channel region ( 4 ), and wherein a pocket region ( 7 ) of the second conductivity type and with a doping concentration higher than the doping concentration of the channel region ( 4 ) is formed below the extensions ( 2 A, 3 A), and wherein the pocket region ( 7 ) is formed by implanting heavy ions in the semiconductor body ( 1 ), after which implantation a first annealing process is done at a moderate temperature and a second annealing process with fast ramp-up is done at a higher temperature. According to the invention, the method is characterized in that between the two annealing processes amorphous silicon in the semiconductor body ( 1 ) is intentionally kept present in a surface region of the semiconductor body ( 1 ) which extends from the surface of the semiconductor body up to about the projected range of the implanted pocket region ( 7 ). This may be obtained by e.g. timely interrupting the first annealing process or by making the relevant region amorphous by an implantation of inert ions between the first and the second annealing process. In this way a very abrupt and narrow doping profile in the pocket region ( 7 ) is obtained, which is advantageous for future CMOS devices.
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