发明名称 Charge trap flash memory device, fabrication method thereof, and write/read operation control method thereof
摘要 In one aspect, a charge trap flash memory device is provided which includes a semiconductor substrate, source and drain regions which are spaced apart in an active region of the semiconductor substrate to define a channel region therebetween, a tunneling dielectric layer located on the channel region, an organic polymer thin film located on the tunneling dielectric layer, metal or metal oxide nano-crystals embedded in the organic polymer thin film, and a gate located on the organic polymer thin film.
申请公布号 US2007102750(A1) 申请公布日期 2007.05.10
申请号 US20060580102 申请日期 2006.10.13
申请人 KIM TAE-WHAN;KIM YOUNG-HO;KIM JAE-HO;JUNG JEA-HUN;YOON CHONG-SEUNG 发明人 KIM TAE-WHAN;KIM YOUNG-HO;KIM JAE-HO;JUNG JEA-HUN;YOON CHONG-SEUNG
分类号 H01L29/76 主分类号 H01L29/76
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