发明名称 DUAL BIT MULTI-LEVEL BALLISTIC MONOS MEMORY, AND MANUFACTURING METHOD, PROGRAMMING, AND OPERATION PROCESS FOR THE MEMORY
摘要 In this invention, a fast low voltage ballistic program, ultra-short channel, ultra-high density, dual-bit multi-level flash memory is disclosed with a two or three polysilicon split gate side wall process and it operation. The structure and operation of this invention is enabled by a twin MONOS cell structure having an ultra-short control gate channel. The cell structure is realized by (i) placing side wall control gates (240) over a composite of Oxide-Nitride-Oxide (ONO) (230) on both sides of the word gate (245), and (ii) forming the control gates and bit impurity layer by self-alignment and sharing the control gates and bit impurity layers between neighboring memory cells for high density. Key elements used in this process are: 1) Disposable side wall process to fabricate the ultra short channel and the side wall control gate with or without a step structure, and 2) Self-aligned definition of the control gate over the storage nitride and the impurity layer. <IMAGE>
申请公布号 EP1345273(A4) 申请公布日期 2007.05.09
申请号 EP20010997853 申请日期 2001.11.21
申请人 HALO LSI, INC. 发明人 OGURA, SEIKI;OGURA, TOMOKO;HAYASHI, YUTAKA
分类号 H01L21/28;H01L21/8247;H01L21/8246;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/28
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