| 摘要 |
A differential voltage signal (LVDS) driver circuit and/or a Current Mode Logic (CML) driver circuit. The circuit includes two current switches, each coupled to a corresponding input node. In a complementary manner, when a differential signal is applied across the input nodes, one current switch is open, while the other current switch is closed, and vice versa. A current allocation component allocates current between the two input current switches such that, when the first current switch is closed and the second current switch is open, increasing current is allocated through the first current switch and the intervening current path between the current allocation component and the first current switch, and vice versa. The circuit includes complementary pre-emphasis and/or current-aided pre-emphasis mechanisms that boost differential output transmission edges.
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