| 发明名称 |
Method of fabricating semiconductor integrated circuit device |
| 摘要 |
A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.
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| 申请公布号 |
US7214577(B2) |
申请公布日期 |
2007.05.08 |
| 申请号 |
US20040006702 |
申请日期 |
2004.12.08 |
| 申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
NISHIHARA SHINJI;IKEDA SHUJI;HASHIMOTO NAOTAKA;MOMIJI HIROSHI;ABE HIROMI;FUKADA SHINICHI;SUZUKI MASAYUKI |
| 分类号 |
H01L21/8238;H01L21/00;H01L21/285;H01L21/336;H01L21/44;H01L21/4763;H01L21/762;H01L21/84;H01L23/532;H01L29/45;H01L29/49;H01L29/78 |
主分类号 |
H01L21/8238 |
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