发明名称 Memory device having asynchronous/synchronous operating modes
摘要 An integrated circuit memory device comprises a memory array to store data, a circuit to output the data at a pin, and a register to store a value that indicates a mode of operation of the integrated circuit memory device. The mode of operation is selected from at least one of a synchronous mode of operation and an asynchronous mode of operation. During the synchronous mode of operation, the circuit outputs the data in response to a transition of an external clock signal. During the asynchronous mode of operation, the circuit outputs the data after a period of time from when a transition of an external control signal is detected.
申请公布号 US7213121(B2) 申请公布日期 2007.05.01
申请号 US20050123931 申请日期 2005.05.06
申请人 发明人
分类号 G06F13/14;G06F12/00;G06F13/16;G11C5/00;G11C7/10;G11C7/22;G11C8/18 主分类号 G06F13/14
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