发明名称 Methods of forming silicide layers on source/drain regions of MOS transistors
摘要 Methods of forming MOS transistors include forming lightly and heavily doped source/drain regions adjacent to one another in a substrate and a gate electrode with a sidewall spacer thereon. A salicide process is performed on a surface of the heavily doped source/drain region to provide a first suicide layer self-aligned to the sidewall spacer. At least a portion of the sidewall spacer is removed to expose a portion of the lightly doped source/drain region adjacent to the first silicide layer. A salicide process in performed on the exposed portion of the lightly doped source/drain region to provide a second silicide layer adjacent to the first suicide layer. Related devices are also disclosed.
申请公布号 US7211515(B2) 申请公布日期 2007.05.01
申请号 US20030388354 申请日期 2003.03.14
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE YOUNG-KI;SHIN HEON-JONG;SHIN HWA-SOOK
分类号 H01L21/44;H01L29/78;H01L21/336 主分类号 H01L21/44
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