Systematic error correcting method for e.g. computer memory chip, involves decoding corrected message bit by logical calculation performed from combination of number of control bits lower than total number of bits of control syndrome

摘要

The method involves decoding a bit of corrected message by a logical calculation performed from a combination of a number of control bits lower than total number of bits of control syndrome and from a combination of three bits of the control syndrome. The syndrome represents a comparison between the values calculated respectively before and after a potential error, of a set of signature bits forming a word or signature syndrome depending on the value of a message word. An independent claim is also included for a device for systematic correction of an error that occurs, within the data bits of a word of message, between an original value and a dubious value of the word of message.