发明名称 SEMICONDUCTOR DIGITAL CIRCUIT, FIFO BUFFER CIRCUIT, AND DATA DELIVERY METHOD USED THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor digital circuit capable of quickly transmitting signals to be transmitted to the outside by reducing a hardware overhead of a circuit for entry management. SOLUTION: A plurality of data entry registers 11a-11d, a write entry management circuit 10 and a full signal generating circuit 14 are arranged in an input side area 1, and a read entry management circuit 13, an empty signal generating circuit 15 and an output selector 16 are arranged in an output side area 2. Asynchronous RS-FF circuits are adopted as entry management flag circuits 12a-12d, and the presence of effective data in data entry is managed by setting with an entry write signal and resetting with an entry read signal. The full signal generating circuit 14 and the empty signal generating circuit 15 directly output full signals and empty signals when they are generated, and carry out clock synchronization when released. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007108966(A) 申请公布日期 2007.04.26
申请号 JP20050298267 申请日期 2005.10.13
申请人 NEC CORP 发明人 SUZUKI KAZUMASA
分类号 G06F13/42;G11C7/00 主分类号 G06F13/42
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