发明名称 Semiconductor memory
摘要 A precharge voltage generating circuit outputs any of a plurality of kinds of precharge voltages in accordance with an ambient temperature. A precharge circuit supplies the precharge voltage to a bit line during the nonaccess of a dynamic memory cell. A sense amplifier amplifies a difference between the voltage of a data signal read from the dynamic memory cell onto the bit line and the supplied precharge voltage. The precharge voltage is altered in accordance with the ambient temperature, whereby the read margin of the sense amplifier can be changed, and the worst value of the data retaining time of the memory cell can be improved. As a result, the frequency of refreshing of the memory cell can be lowered, reducing power consumption and a standby current.
申请公布号 US2007091703(A1) 申请公布日期 2007.04.26
申请号 US20060580058 申请日期 2006.10.13
申请人 FUJITSU LIMITED 发明人 NISHIMURA KOICHI;IKEMASU SHINICHIRO
分类号 G11C11/34;G11C7/04;G11C7/12;G11C11/403;G11C11/406;G11C11/409;G11C11/4094 主分类号 G11C11/34
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