发明名称 OUTPUT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an output circuit preventing a mistaken recognition in the case of a power-off while being able to inhibit an increase in a power consumption in the case of a power-on. SOLUTION: In a transistor TP2 connected between an output terminal PO and a high-potential power supply AVD3, the potential of a back gate for the transistor TP2 controls the potential of the output terminal PO in the off-case of a high-potential power supply AVD3 by a control unit 43 at the potential of the back gate. A detector 42 outputs a detecting signal S11 detecting the potential of the high-potential power supply AVD3 by a plurality of resistors R11 to R14. The transistor T21 turned on-off in response to a standby signal STBY is fitted to the detector 42, and the transistor T21 is controlled so as to be turned off in the on-case of the high-potential power supply AVD3 by the standby signal STBY. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007110398(A) 申请公布日期 2007.04.26
申请号 JP20050298847 申请日期 2005.10.13
申请人 FUJITSU LTD 发明人 SHIMIZU TEN
分类号 H03K19/0175 主分类号 H03K19/0175
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