发明名称 Flexible ordered execution mechanism for multi-threaded processors
摘要 A multi-threaded processor adapted to perform ordered execution, wherein the execution of threads, or code portions, is delayed if, and only if, execution of a thread would violate the ordered execution of a program. The processor initializes a Global Start Register and a Global Finish Register; saves an initial value of the Global Start Register and then increments the Global Start Register upon execution of each code portion requiring ordered execution; increments the Global Finish Register upon completion of execution of the code portion; and, compares the initial value of the Global Start Register with the present value of the Global Finish Register. If the initial value of the Global Start Register is equal to the present value of the Global Finish Register, indicating that no out-of-order execution of code portions has occurred, the processor increments the Global Finish Register; or, if the initial value of the Global Start Register is not equal to the present value of the Global Finish Register, indicating out-of-order execution, it waits for a specified event and then again compares the initial value of the Global Start Register with the present value of the Global Finish Register, repeating until they are equal.
申请公布号 US2007094663(A1) 申请公布日期 2007.04.26
申请号 US20050258307 申请日期 2005.10.25
申请人 发明人 ANBARANI HOSSEIN A.
分类号 G06F9/46 主分类号 G06F9/46
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