发明名称 Speicherschnittstellenvorrichtung und Vorrichtung zur Speicheradressengeneration
摘要 The invention provides a memory address generation device (507) capable of generating a plurality of addresses used in a memory, which enables signal processing of a plurality of non-synchronous video signals using only one memory. One of a plurality of reference addresses (508) may alternatively be selected (509). One of a plurality of offset values (503) may alternatively be selected (504). Addresses are obtained (505) with respect to the selected reference address using the selected offset.
申请公布号 DE69836786(T2) 申请公布日期 2007.04.26
申请号 DE1998636786T 申请日期 1998.10.02
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD.;TEXAS INSTRUMENTS INC. 发明人 MIKI, YOICHIRO;TANI, MASAHIRO;NINOMIYA, KAZUKI;TOKUNAGA, NAOYA
分类号 G06F13/16;G06F12/06;G09G1/16;H04N7/26;H04N7/50;H04N7/52 主分类号 G06F13/16
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