| 摘要 |
An imaging engine includes a plurality of linear imaging arrays, image formation optics, at least one illumination module and supporting circuitry that are embodied within a modular engine housing. The plurality of linear imaging arrays and image formation optics are mounted on an optical bench (which is integral to the engine housing) and provide field of views corresponding to the plurality of linear image arrays. The at least one illumination module produces planar light illumination that substantially overlaps the field of views corresponding to the plurality of linear imaging arrays. The supporting circuitry includes: timing signal generation circuitry that supplies timing signals to the linear imaging arrays in order to read out the row image data produced by such arrays (such row image data may be read out at a constant line rate or at a variable line rate); illumination control circuitry that supplies current to the illumination sources in the at least one illumination module; analog-to-digital conversion circuitry, which optionally filters row data image signal supplied thereto (to remove unwanted noise components) and converts the row image data supplied thereto into digital form; and data buffering circuitry, for storing the digital row image data generated by the analog-to-digital conversion circuitry and communicating the row image data stored therein over a data communication bus. One linear image array (e.g., linear imaging array C) may have a variable line rate that is controlled by the timing signals supplied thereto such that the image capture operations performed by the one linear imaging array (e.g. linear imaging array C) maintain a substantially constant aspect ratio, to thereby compensate for aspect ratio distortions that result from variations in velocity of engine with respect to target object(s). The variable line rate is based upon velocity estimates derived from processing of the pixel data values of other linear imaging arrays disposed therein. The supporting circuitry may optionally include a line rate adjustment module, preferably realized as part of a programmed controller, that is operably coupled to timing signal generation circuitry and adjusts the variable line rate of the one linear image device (e.g., linear imaging array C); output illumination control module, preferably realized as part of the programmed controller, that is operably coupled to the illumination control circuitry and adjusts the optical power level and/or illumination time period for the illumination that overlaps one or more of the FOVs of the linear imaging arrays of the engine for speckle reduction/constant white levels; and/or imaging processing circuitry, operably coupled to the data buffering circuitry over the data communication bus, that realizes portions of image-based mechanisms/techniques for image velocity estimation, aspect ratio compensation, jitter estimation and compensation, bar code detection, OCR, and image lift.
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