发明名称 INTEGRATING CAPACITANCE CIRCUITRY FOR AN INTEGRATING AMPLIFIER AND RELATED METHOD
摘要 An integrating capacitor circuit (Figure 1C) for an integrating amplifier and related methods are disclosed that allow for efficient detection of currents or charges, particularly those produced by pixel cells in a detector image array. By placing a capacitor- connected field effect transistor (FET 120B) in parallel with an integration capacitor (120A) and setting its gate voltage to a selected voltage level, the current or charge from the detector depletes the charge on the gate of the FET capacitor (120B) while integrating on the capacitor (120A). In addition, the gate voltage level can be adjusted to modify the current depleting characteristics of the capacitor-connected FET (120B). The resulting operation of this integrating circuitry provides significant resulting advantages for the integrating amplifier.
申请公布号 WO2006065500(A3) 申请公布日期 2007.04.26
申请号 WO2005US42845 申请日期 2005.11.28
申请人 L-3 COMMUNICATIONS CORPORATION;BRADY, JOHN F., III;GALEEMA, STEPHEN D. 发明人 BRADY, JOHN F., III;GALEEMA, STEPHEN D.
分类号 G06F7/64;G06G7/18;G06G7/19 主分类号 G06F7/64
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