发明名称 COMPILE METHOD AND COMPILE DEVICE
摘要 PROBLEM TO BE SOLVED: To parallelize a loop so as to perform parallel execution when the effects of parallel execution is expected, and to perform successive execution when the effects of parallel execution is not expected when the loop length of the parallelized loop is unclear. SOLUTION: This compile device generates an object code 107 executable on a shared memory type computer with a thread as the unit of parallel processing by input of a source program 101 and using an inter-thread synchronous overhead information file 108 and the number of machine cycles acquisition library 106, and is constituted of a syntax analysis part 103, a parallelization part 104 and a code generation part 105. The parallelization part 104 executes the first repetition of a loop which can be parallelized, and acquires the number of machine cycles whose loop repetition is one time, and generates an object code to determine a threshold as loop length from which the acquisition of the effects of parallel execution is expected. Thus, it is possible to perform highly efficient parallel execution by a static determination system in a development time shorter than that in an execution information sampling system. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007108838(A) 申请公布日期 2007.04.26
申请号 JP20050296243 申请日期 2005.10.11
申请人 HITACHI LTD 发明人 TORIKAI SATOSHI
分类号 G06F9/45 主分类号 G06F9/45
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