发明名称 AUTOMATIC DETECTION OF A CMOS CIRCUIT DEVICE IN LATCH-UP AND RESET OF POWER THERETO
摘要 A monitoring and protection circuit associated with a voltage regulator supplying power to a CMOS circuit device can sense over current levels precisely enough for determining if a fault has occurred, e.g., latch-up, failed or shorted transistor, etc., then this monitoring and protection circuit may automatically generate a fault alert signal and/or cycle power to the CMOS circuit device when an unexpected over current may occur, e.g., CMOS circuit latch-up. The monitoring and protection circuit may be integrated with a voltage regulator, e.g., low drop-out (LDO) voltage regulator. The monitoring and protection circuit may be integrated with a CMOS circuit device, e.g., digital processor. The monitoring and protection circuit may be a stand alone device.
申请公布号 WO2007047804(A2) 申请公布日期 2007.04.26
申请号 WO2006US40808 申请日期 2006.10.19
申请人 MICROCHIP TECHNOLOGY INCORPORATED;JULICHER, JOSEPH, HARRY 发明人 JULICHER, JOSEPH, HARRY
分类号 G06F1/08 主分类号 G06F1/08
代理机构 代理人
主权项
地址