发明名称 Method for fabricating memory device with recess channel MOS transistor
摘要 A method for fabricating line type recess channel MOS transistors utilizes a lithography process to form line type gate trenches in the line type recess channel MOS transistors before finishing a STI process. The method can further control the critical dimension variation in a range required in precision semiconductor processes. Therefore, the short problem between the transistors can be avoided.
申请公布号 US7579234(B2) 申请公布日期 2009.08.25
申请号 US20070960711 申请日期 2007.12.20
申请人 NANYA TECHNOLOGY CORP. 发明人 LIN SHIAN-JYH
分类号 H01L21/8242 主分类号 H01L21/8242
代理机构 代理人
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