发明名称 |
MONITORING AND CONTROL OF REFERENCE CLOCKS TO REDUCE BIT ERROR RATIO |
摘要 |
A method for reducing a frequency error, including: applying a plurality of dither values to a local reference clock over a first time interval; sampling, during the first time interval and using the local reference clock, a first plurality of data values received over an asynchronous link, where the first plurality of data values are transmitted over the asynchronous link based on a remote reference clock; tracking a plurality of errors from sampling the first plurality of data values; and adjusting, based on the plurality of errors, a frequency of the local reference clock to reduce the frequency error between the local reference clock and the remote reference clock. |
申请公布号 |
US2016191202(A1) |
申请公布日期 |
2016.06.30 |
申请号 |
US201414587477 |
申请日期 |
2014.12.31 |
申请人 |
Barrow Shawn |
发明人 |
Barrow Shawn |
分类号 |
H04L1/00;H04L7/033;H04L1/20;H04L7/00 |
主分类号 |
H04L1/00 |
代理机构 |
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代理人 |
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主权项 |
1. A method for reducing a frequency error, comprising:
applying a plurality of dither values to a local reference clock over a first time interval by modifying a divider; sampling, during the first time interval and using the local reference clock, a first plurality of data values received over an asynchronous link, wherein the first plurality of data values are transmitted over the asynchronous link based on a remote reference clock; tracking a plurality of bit errors from the sampling of the first plurality of data values; and adjusting, based on the plurality of bit errors, a frequency of the local reference clock to reduce the frequency error between the local reference clock and the remote reference clock. |
地址 |
Suwanee GA US |