发明名称 |
Apparatus and method for adapting a level sensitive device to produce edge-triggered behavior |
摘要 |
A circuit for adapting a level sensitive memory device to exhibit edge-triggered behavior. The adapter circuit can be used with testing modules that expect edge-triggered behavior. The adapting circuit may include address decoding circuitry and output storage and delay circuitry.
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申请公布号 |
US7210079(B2) |
申请公布日期 |
2007.04.24 |
申请号 |
US20050321012 |
申请日期 |
2005.12.28 |
申请人 |
INTEL CORPORATION |
发明人 |
REYNOLDS, JR. JOHN C. |
分类号 |
G11C29/00;G01R31/28;G01R31/317;G06F11/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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