| 摘要 |
A dual video decoder of a digital broadcasting receiver is provided. The decoder includes: a first PES decoder for decoding a first video PES outputted from a first system decoder, into a first video ES; a second PES decoder for decoding a second video PES outputted from a second system decoder, into a second video ES; a VBV (Video Buffer Verifier) buffer memory divided into a first video ES region and a second video ES region; a decoding controller for outputting a control signal to determine a to-be-decoded video ES among the first and second video ESs, and independently decode the first and second video ESs in a single decoding unit; and the single decoding unit for reading the to-be-decoded video ES from the corresponding region of the VBV buffer memory. |
