发明名称 |
DELAY CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE CONTAINING A DELAY CIRCUIT AND DELAY METHOD |
摘要 |
<p>A delay circuit including a delay section having two or more predetermined delay stages is disclosed. Each predetermined delay stage adds a predetermined delay time to an input signal. The delay circuit also includes selecting switch sections. At least one of the selecting switch sections includes: a buffer section for receiving a delayed input signal from one of the delay stages and a selecting section means directly connected to the buffer section for activating the buffer section to establish a delay path, wherein an output signal from the delay path has a desired delay time.</p> |
申请公布号 |
KR100709534(B1) |
申请公布日期 |
2007.04.23 |
申请号 |
KR20010051368 |
申请日期 |
2001.08.24 |
申请人 |
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发明人 |
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分类号 |
G11C8/00;G11C11/4076;H03K5/00;H03K5/14 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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