| 发明名称 | Stage circuit and scan driver using the same | ||
| 摘要 | A stage circuit and a scan driver, the stage circuit including a switch unit configured to selectively electrically couple a first node to one of a first input terminal and a second input terminal, a first driver coupled to the first node, to a second node, to a third node, to a first clock terminal, and to a second clock terminal, and a second driver coupled to the second node, to the third node, to a third clock terminal, and to a common terminal, and configured to output a scan signal to an output terminal. | ||
| 申请公布号 | US9406261(B2) | 申请公布日期 | 2016.08.02 |
| 申请号 | US201414276980 | 申请日期 | 2014.05.13 |
| 申请人 | Samsung Display Co., Ltd. | 发明人 | Kim Yong-Jae;Kim Dong-Gyu;Moon Sung-Jae |
| 分类号 | G11C19/00;G09G3/32;G11C19/28 | 主分类号 | G11C19/00 |
| 代理机构 | Lewis Roca Rothgerber Christie LLP | 代理人 | Lewis Roca Rothgerber Christie LLP |
| 主权项 | 1. A stage circuit comprising: a switch unit configured to selectively electrically couple a first node to one of a first input terminal and a second input terminal; a first driver coupled to the first node, to a second node, to a third node, to a first clock terminal configured to receive a first clock signal, and to a second clock terminal configured to receive a second clock signal; and a second driver coupled to the second node, to the third node, to a third clock terminal configured to receive a third clock signal, and to a common terminal, and configured to output a scan signal to an output terminal, wherein the first clock signal, the second clock signal, and the third clock signal are different, and wherein the stage circuit is configured to receive the third clock signal before the first clock signal and after the second clock signal. | ||
| 地址 | Yongin-si KR | ||