发明名称
摘要 <p>PROBLEM TO BE SOLVED: To provide an exposure method by which an alignment mark can be arranged without degrading the exposing accuracy even when the number of exposing steps is increased. SOLUTION: The layout data of alignment marks on each layer are arranged so that the layout data about the alignment marks on the first and fifth layers may overlap each other in the transversal and longitudinal directions of a chip 1 of an IC pattern. A reticle is prepared based on the layout data and is exposed by shielding one of alignment marks from the light.</p>
申请公布号 JP3907940(B2) 申请公布日期 2007.04.18
申请号 JP20000369040 申请日期 2000.12.04
申请人 发明人
分类号 H01L21/027;G03F1/42;G03F9/00 主分类号 H01L21/027
代理机构 代理人
主权项
地址
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