COMPUTER SYSTEM OF GENERATING CLOCK SIGNAL FITTED FOR A PLURALITY OF OF MEMORY MODULES AND METHOD OF THE SAME,申请号KR20000016561-传众专利搜索

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发明名称	COMPUTER SYSTEM OF GENERATING CLOCK SIGNAL FITTED FOR A PLURALITY OF OF MEMORY MODULES AND METHOD OF THE SAME
摘要
申请公布号	KR100708826(B1)	申请公布日期	2007.04.17
申请号	KR20000016561	申请日期	2000.03.30
申请人		发明人
分类号	G06F9/30	主分类号	G06F9/30
代理机构		代理人
主权项
地址

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