发明名称 Highly parallel switching systems utilizing error correction II
摘要 An interconnection network has a first stage network and a second stage network and a collection of devices outside the network so that a first device is capable of sending data to a second device. The first stage network is connected to inputs of the second stage network. The first and second stage networks each have more outputs than inputs. The data is first sent from the first device to the first stage network and then from the first stage network to the second stage network. The data is sent to the second device from the second stage network. The number of inputs to a device from the second stage network exceeds the number of outputs from a device into the first stage network. The latency through the entire system may be a fixed constant.
申请公布号 US7205881(B2) 申请公布日期 2007.04.17
申请号 US20050074406 申请日期 2005.03.08
申请人 INTERACTIC HOLDINGS, LLC 发明人 REED COKE S.;MURPHY DAVID
分类号 H04Q3/00;H04L12/56;H04Q3/68;H04Q11/00 主分类号 H04Q3/00
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