发明名称 Built-in self test circuit and test method for storage device
摘要 A built-in self test circuit includes a capture register storing data transmitted from a memory device, an operation controller controlling operation of the memory device and the capture register, a hold controller executing a hold operation to stop a read operation and a write operation of the memory device by transmitting a hold signal to the operation controller, and a test control circuit controlling the operation controller to transmit a capture signal so that the capture register stores the data to the capture register.
申请公布号 US7206984(B2) 申请公布日期 2007.04.17
申请号 US20050089232 申请日期 2005.03.23
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ANZOU KENICHI
分类号 G01R31/28;G01R31/3187;G11C29/00;G11C29/38;G11C29/50;H01L21/822;H01L27/04 主分类号 G01R31/28
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