| 摘要 |
An electrostatic withstand voltage test method that enables semiconductor integrated circuit testing to be performed with a high degree of precision and at low cost. In this method, with one of ground pins VSS and VSSI of a semiconductor integrated circuit 100 grounded, static electricity is applied from a static electricity discharge apparatus 102 to all pins of semiconductor integrated circuit 100 , after which, with power supply apparatus 106 connected to power supply pin VDD of semiconductor integrated circuit 100 and the other grounded, a leakage current test apparatus 116 is connected to all signal pins and pin leakage current is tested, and with ground pin VSSI of the internal circuitry of semiconductor integrated circuit 100 grounded and leakage current test apparatus 104 connected to power supply pin VDDI, a pattern generator 105 that supplies a digital signal is connected to signal input pins (IN, I/O), and power supply leakage current is tested.
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