发明名称 Bit stream conditioning circuit having output pre-emphasis
摘要 A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a Printed Circuit Board (PCB). The high-speed bit stream interface includes a line side interface, a board side interface, and a signal conditioning circuit. The signal conditioning circuit services each of an RX path and a TX path and includes a clock and data recovery circuit and an output pre-emphasis circuit. The output pre-emphasis circuit controllably modifies the spectrum of the high-speed bit stream to pre-compensate for the spectral characteristics of a signal path upon which the high-speed bit stream will be output. In the RX path, pre-compensation is performed based upon the properties of the PCB and a servicing connector. In the TX path, pre-compensation is performed based upon the properties of a line side connector and a line side media.
申请公布号 US7206337(B2) 申请公布日期 2007.04.17
申请号 US20030393613 申请日期 2003.03.21
申请人 BROADCOM CORPORATION 发明人 TONIETTO DAVIDE;GHIASI ALI
分类号 H04L5/16;G11B20/10;H04J3/04;H04J3/06;H04L1/20;H04L25/03;H04L25/20 主分类号 H04L5/16
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