发明名称 Semiconductor device including active regions and gate electrodes for field effect transistors, with a trench formed between the active regions
摘要 A semiconductor device has p-channel field effect transistors disposed in a lattice shape. In order to generate compression stress in the channel of a p-channel field effect transistor, a long active region of a plurality of transistors is divided for each gate electrode and a sufficiently thin shallow trench isolation (STI) is formed between adjacent gate electrodes. The drain current characteristics can be improved.
申请公布号 US7205617(B2) 申请公布日期 2007.04.17
申请号 US20020330196 申请日期 2002.12.30
申请人 RENESAS TECHNOLOGY CORP. 发明人 OHTA HIROYUKI;KUMAGAI YUKIHIRO;SONOBE YASUO;ISHIBASHI KOUSUKE;TAINAKA YASUSHI;MIYAMOTO MASAFUMI;MIURA HIDEO
分类号 H01L21/76;H01L29/76;H01L21/335;H01L21/822;H01L21/8234;H01L21/8238;H01L27/04;H01L27/08;H01L27/088;H01L27/092;H01L29/00;H01L29/06;H01L29/10;H01L29/78 主分类号 H01L21/76
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