| 摘要 |
PROBLEM TO BE SOLVED: To provide an apparatus and a method for designing semiconductor integrated circuits in which more realistic process variations can be taken into account when designed, increased performance and design convergence of a semiconductor integrated circuit can be provided without setting design margins that are more than needed, enhanced quality can be expected through the securement of necessary margins, simple calculations, and high-speed processing are attained. SOLUTION: Two paths (arrival path and required path) to be analyzed are integrated as one path, and in-chip random variation components (σr) are calculated for a plurality of nodes that constitute the one path (S1). Next, in-chip variation componentsσchip are calculated on the basis of the in-chip random variation components (σr) and in-chip systematic variation components (σs) (S2). Thereafter, delay variations (Docv) are calculated on the basis of the reference delay (Dbase) of the entire path and the in-chip variation components (σchip) (S3). COPYRIGHT: (C)2007,JPO&INPIT
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