Combinatorial circuit for parallel conversion of sign/number into two`s complement representations, has switch generating inverting signals that are derived from groups generating and groups forwarding signals that are determined by switch

摘要

The circuit has a switch generating inverting signals (120-122) necessary for the conversion, where the signals are derived from groups generating signals (117-119) and groups forwarding signals (114-116) that are determined by the switch. The generating signals and forwarding signals are combined into groups. The individual inverting signals combined with the groups are derived for each bit position, where a logarithmic step results in a total delay time. All switches are utilized in forward and reverse paths, where the generating and forwarding signals are generated in the forward path.