发明名称 SIMULATION APPARATUS AND SIMULATION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a simulation apparatus and a simulation method, which may implement a high speed simulating process. SOLUTION: A simulation apparatus 1 having a VLIW type processor, comprising: a memory unit 2 for storing a program file with a plurality of VLIW instructions for each specified instruction; an instruction read out unit 3 for reading the program file from the memory unit 2; an instruction decoding unit 4 for selecting the information in order to identify existing instructions as decoding information, each of which has an interfering relation or may generate an exception within each instruction, when the VLIW instructions for the program file being read have been decoded; a decoding information holding unit 5 for keeping a selected decoding data; and an instruction executing unit 6 for executing the VLIW instructions by using the selected decoding data when that data is stored in the information holding unit 5. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007094986(A) 申请公布日期 2007.04.12
申请号 JP20050286751 申请日期 2005.09.30
申请人 FUJITSU LTD 发明人 IKE ATSUSHI
分类号 G06F9/38;G06F9/455;G06F12/08 主分类号 G06F9/38
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