| 摘要 |
The aim of the present invention is to propose a method and a device in order to avoid damages that the desynchronisation of the program counter may cause. This aim is achieved by means of a secured microprocessor comprising a program counter and an interface with a program memory containing the instructions, this microprocessor being wherein it includes a historical memory of the program counter indicating the position of the program counter at the time of the execution of the previous instruction, and an instruction verification module, this module comprising reading means of an additional piece of verification information that defines for the instruction in progress, the supposed position of the previous program counter, this verification module comprising means to compare this verification information with that originating from the historical memory and means to generate an error if the verification indicates an incompatibility.
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