发明名称 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device using a fully silicided gate process in which the width of a gate interconnection is narrow, wherein a contact area between the gate interconnection and a contact can be easily secured and the wire resistance of the gate interconnection can be made small without changing the designing rules of the gate interconnection. SOLUTION: The semiconductor device includes an element isolation region 12 formed in a semiconductor substrate 10 and an active region 11 surrounded by the element isolation region 12, the fully silicided gate interconnection 19 formed on the element isolation region 12 and on the active region 11, and an insulating side wall 21 which continuously covers the side face of the gate interconnection 19. At least part of the gate interconnection 19 is so formed as to overhang the side wall 21. COPYRIGHT: (C)2007,JPO&INPIT |
申请公布号 |
JP2007095912(A) |
申请公布日期 |
2007.04.12 |
申请号 |
JP20050281880 |
申请日期 |
2005.09.28 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
SATO YOSHIHIRO;HIRASE JUNJI |
分类号 |
H01L21/8234;H01L21/28;H01L21/3205;H01L21/8238;H01L23/52;H01L27/088;H01L27/092;H01L29/78 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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