摘要 |
A method of fabricating a semiconductor device including providing a semiconductor heterostructure, the heterostructure having a relaxed Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer on a substrate, a strained channel layer on the relaxed Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer, and a Si<SUB>1-y</SUB>Ge<SUB>y </SUB>layer; removing the Si<SUB>1-y</SUB>Ge<SUB>y </SUB>layer; and providing a dielectric layer. The dielectric layer includes a gate dielectric of a MISFET. In alternative embodiments, the heterostructure includes a SiGe spacer layer and a Si layer.
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