发明名称 CHEMICAL MECHANICAL PLANARIZATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To perform low scratching, while keeping a high polishing speed and flatness. <P>SOLUTION: A conductive material film is polished through the use of a polishing pad composed of a composition, where particles made of a water-soluble resin are dispersed in a non-water-soluble cross-linking structural body made of cross-linking rubber or a cross-linked thermal curing resin; and a polishing solution contains inorganic/organic composite particles as a polishing solution. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007095842(A) 申请公布日期 2007.04.12
申请号 JP20050280815 申请日期 2005.09.27
申请人 FUJIFILM CORP 发明人 SUGIYAMA SHINICHI
分类号 H01L21/304;B24B37/00;B24B37/20 主分类号 H01L21/304
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