发明名称 Method of manufacturing a semiconductor device having a dual gate structure
摘要 A semiconductor device having a dual gate is formed on a substrate having a dielectric layer. A first metallic conductive layer is formed on the dielectric layer to a first thickness, and annealed to have a reduced etching rate. A second metallic conductive layer is formed on the first metallic conductive layer to a second thickness that is greater than the first thickness. A portion of the second metallic conductive layer formed in a second area of the substrate is removed using an etching selectivity. A first gate structure having a first metallic gate including the first and the second metallic conductive layers is formed in a first area of the substrate. A second gate structure having a second metallic gate is formed in the second area. A gate dielectric layer is not exposed to an etching chemical due to the first metallic conductive layer, so its dielectric characteristics are not degraded.
申请公布号 US2007082415(A1) 申请公布日期 2007.04.12
申请号 US20060497972 申请日期 2006.08.01
申请人 JEON TAEK-SOO;SHIN YU-GYUN;KANG SANG-BOM;CHO HAG-JU;LEE HYE-LAN;KIM SANG-YONG 发明人 JEON TAEK-SOO;SHIN YU-GYUN;KANG SANG-BOM;CHO HAG-JU;LEE HYE-LAN;KIM SANG-YONG
分类号 H01L21/00 主分类号 H01L21/00
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