ASYMMETRIC HIGH VOLTAGE MOS DEVICE AND METHOD OF FABRICATION
摘要
An asymmetric semiconductor device (10) and method of forming the same in which 25V devices can be fabricated in processes with gate oxide thicknesses designed for 2.75 or 5.5V maximum operation. The device includes: a shallow trench isolation (STI) region (12) that forms a dielectric between a drain region (18) and a gate region (20) of a unit cell to allow for high voltage operation; and an n-type well (14) and a p-type well (24) patterned within the unit cell.
申请公布号
WO2006103634(A3)
申请公布日期
2007.04.12
申请号
WO2006IB50970
申请日期
2006.03.30
申请人
KONINKLIJKE PHILIPS ELECTRONICS, N.V.;LETAVIC, THEODORE;EFFING, HERMAN;COOK, ROBERT