| 摘要 |
A semiconductor memory device includes: a memory cell array with m memory cells arranged in a first direction and n memory cells arranged in a second direction in a grid, each memory cell having a capacitor part using a ferroelectric film, and also having a first terminal, a second terminal, and a third terminal; two or more first wirings connecting the first terminals of the m memory cells arranged in the first direction; two or more second wirings connecting the second terminals of the n memory cells arranged in the second direction; and two or more third wirings connecting the third terminals of the m memory cells, the third wirings including, from among unit blocks resulting from dividing the memory cell array into q sections in the first direction and r sections in the second direction, each unit block having s memory cells arranged in the first direction and t memory cells arranged in the second direction in a grid, first to t-th wiring parts connecting the s memory cells arranged in the first direction in a first unit block, first to t-th wiring parts connecting the s memory cells arranged in the first direction in a second unit block located next to the first unit block in the first direction, and connection wiring parts connecting the first to t-th wiring parts in the first unit block and the first to t-th wiring parts in the second unit block so that the wiring parts with the same level are not connected, and also connecting ends on the second unit block side of the wiring parts in the first unit block and ends on the first unit block side of the wiring parts in the second unit block, wherein the connection wiring parts are crossed between the first unit block and the second unit block.
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