发明名称 |
Versatile system for limiting electric field degradation of semiconductor structures |
摘要 |
The present invention provides a system for limiting degradation of a first semiconductor structure ( 304 ) caused by an electric field ( 314 ), generated from within the semiconductor substrate ( 302 ) by high voltage on a second semiconductor structure ( 310 ). A semiconductor device ( 300 ) is adapted to reduce the effective magnitude of the field-as realized at structure 304 -to some fractional component ( 320 ), or to render the angle ( 322 )-at which the field approaches the first structure through a first substrate region ( 306 )-acute. Certain embodiments of the present invention provide for: lateral recession of the first semiconductor structure to abut an isolation structure ( 312 ), which is disposed between the second semiconductor structure and the first substrate region; lateral recession of the first semiconductor structure from the isolation structure, so as to form a moat therebetween; and a counter-doped region ( 316 ) within the first substrate region.
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申请公布号 |
US7202537(B2) |
申请公布日期 |
2007.04.10 |
申请号 |
US20050180149 |
申请日期 |
2005.07.13 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
CHIDAMBARAM PERIANNAN;BALDWIN GREG C. |
分类号 |
H01L29/76;H01L21/302;H01L23/62 |
主分类号 |
H01L29/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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