发明名称 Integrated stress relief pattern and registration structure
摘要 A semiconductor die having an integrated circuit region formed in a substrate comprises at least one die-corner-circuit-forbidden (DCCF) region disposed in the substrate, proximate to the integrated circuit region; and at least one registration feature formed within the at least one DCCF region. The at least one registration feature comprises a structure selected from the group consisting of a laser fuse mark, an alignment mark, and a monitor mark.
申请公布号 US7202550(B2) 申请公布日期 2007.04.10
申请号 US20040983425 申请日期 2004.11.08
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 FU CHUNG-MIN;LIN HUANG-SHENG;HARN YU-CHYI;CHEN HSIEN-WEI
分类号 H01L23/544;H01L23/00;H01L23/48;H01L23/52;H01L23/58;H01L29/40;H01R13/627 主分类号 H01L23/544
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