发明名称 Method for manufacturing wiring and method for manufacturing semiconductor device
摘要 The present invention provides a method for manufacturing a wiring and a method for manufacturing a semiconductor device, which do not require a photolithography step in connecting a pattern of an upper layer and a pattern of a lower layer. According to the present invention, a composition including a conductive material is discharged locally and an electric conductor to function as a pillar is formed on a first pattern over a substrate, an insulator is formed to cover the electric conductor, the insulator is etched to expose a top surface of the electric conductor, and a second pattern is formed on the top surface of electric conductor that is exposed.
申请公布号 US7202155(B2) 申请公布日期 2007.04.10
申请号 US20040911815 申请日期 2004.08.05
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 FUKUCHI KUNIHIKO
分类号 H01L21/4763;H01L21/288;H01L21/44;H01L21/768;H01L21/77;H01L21/84;H05K3/40;H05K3/46 主分类号 H01L21/4763
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