发明名称 Controllable phase locked loop via adjustable delay and method for producing an output oscillation for use therewith
摘要 A phase locked loop circuit is implemented with difference detection module that produces a difference signal based on at least one of phase difference and frequency difference between a reference oscillation and a feedback oscillation. A loop filter module converts the difference signal into a control signal. A controlled oscillation module converts the control signal into an output oscillation. An output oscillation adjust module, coupled to the controlled oscillation module, produces an effective output oscillation based on an oscillation control signal. A divider module converts the effective output oscillation into the divided oscillation. A delay adjust module provides an adjustable delay to produce the feedback oscillation.
申请公布号 US7202750(B2) 申请公布日期 2007.04.10
申请号 US20050153144 申请日期 2005.06.15
申请人 发明人
分类号 H03L7/081;H03L7/099 主分类号 H03L7/081
代理机构 代理人
主权项
地址