发明名称 Semiconductor package having substrate with multi-layer metal bumps
摘要 A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizing outer layer. The external contacts are smaller and more uniform than conventional solder balls, and can be fabricated using low temperature deposition processes, such that package warpage is decreased. Further, the external contacts can be shaped by etching to have generally planar tip portions that facilitate bonding to electrodes of a supporting substrate. Die contacts on the substrate can also be formed as multi layered metal bumps having generally planar tip portions, such that the die can be flip chip mounted to the substrate. A method for fabricating the package includes the step of depositing the different layers for the metal bumps using electroless and electrolytic deposition, and then etching the different layers to shape the metal bumps.
申请公布号 US7202556(B2) 申请公布日期 2007.04.10
申请号 US20010023049 申请日期 2001.12.20
申请人 MICRON TECHNOLOGY, INC. 发明人 'KHNG VICTOR TAN CHER;CHAI LEE KIAN
分类号 H01L23/34;H01L23/28;H01L23/48;H01L23/498;H01L23/52;H01L29/40 主分类号 H01L23/34
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