VERFAHREN UND VORRICHTUNGEN ZUR VERBESSERUNG DES DURCHSATZES VON EINGEBETTETEN PROZESSOREN AUF CACHE-BASIS DURCH UMSCHALTEN VON TASKS ALS REAKTION AUF EINE CACHE-VERFEHLUNG

摘要

A digital baseband processor is provided for concurrent operation with different wireless systems. The digital baseband processor includes a digital signal processor for executing digital signal processor instructions, a microcontroller for executing microcontroller instructions, and a timing and event processor controlled by the digital signal processor and the microcontroller for executing timing-sensitive instructions. The timing and event processor includes a plurality of instruction sequencers for executing timing-sensitive instruction threads and a time base generator for generating timing signals for initiating execution of the instruction threads on each of the plurality of instruction sequencers.