| 摘要 |
<P>PROBLEM TO BE SOLVED: To prevent erroneous synchronization in a loop changeover of a digital signal transmission interface circuit. <P>SOLUTION: When a loop control signal LPT for sending a transmitted digital signal SND back to a clock extraction regenerator 20 as a received digital signal RCV is imparted, a switch 11 is changed over to the side of the terminal Y by a signal SA of a timing portion 15. Thereafter, a switch 12 is changed over to the side of the terminal Y by a signal SB, and moreover thereafter a switch 13 is turned on by a signal SC. Time duration from the changeover of the switch 11 to the turn-on of the switch 13 is set to time duration or longer during which step-out can be detected by a frame processor 30 without fail. Consequently, resynchronization processing is performed at the completion of the changeover, and operation is resumed in a correct synchronization state. <P>COPYRIGHT: (C)2007,JPO&INPIT |
